TC74VHCV574FT/fk 2010-07-09 1 toshiba cmos digital integrat ed ci rcuit silicon monolithic TC74VHCV574FT,tc74vhcv574fk octal schmitt d-type flip flop with 3-state output the tc74vhcv574 is advanced high speed cmos octal flip-flop with 3-state output fabricated with silicon gate cmos technology. it achieves the high speed operat ion similar to equivalent bipolar schottky ttl while maintaining the cmos low power dissipation. this 8-bit d-type flip-flop is controlled by a clock input (ck) and an output enable input ( oe ). when the oe input is high, the eight outputs are in a high impedance state. input pin have hysteresis be tween the positive-going and negative-going thresholds. thus the tc74vhcv574 is capable of squaring up transitions of slowly changing input signals and provides an improved noise immunity. input protection and output circuit ensure that 0 to 5.5 v can be applied to the input and output (note) pins without regard to the supply voltage. these structure pr events device destruction due to mismatched supply and input/ou tput voltages such as battery back up, etc. note: output in off-state. features ? high speed: f max = 180 mhz (typ.) at v cc = 5 v ? low power dissipation: i cc = 2 a (max) at ta = 25c ? wide operating voltage range: v cc (opr) = 1.8 v to 5.5 v ? ouput current: |i oh |/i ol = 16 ma (min) (v cc = 4.5 v) ? available in tssop and vssop (us) ? power-down protection provided on all inputs and outputs ? pin and function compatible with the 74 series (74ac/vhc/hc/f/als/ls etc.) 574 type TC74VHCV574FT tc74vhcv574fk weight tssop20-p-0044-0.65a : 0.08 g ( typ.) vssop20-p-0030-0.50 : 0.03 g ( typ.)
TC74VHCV574FT/fk 2010-07-09 2 pin assignment truth table inputs oe ck d output h x x z l x q n l l l l h h x: don?t care z: high impedance q n : no change system diagram v cc 16 q2 q3 q4 15 14 13 12 11 20 oe 1 2 3 4 5 6 7 d4 d5 d6 d7 d0 q5 8 q1 19 q6 q0 d2 d3 18 9 d1 gnd 10 ck 17 q7 (top view) ck oe 1 11 2 d1 d2 d3 d4 d5 d6 d7 d0 3 4 5 6 7 8 9 ck q d ck q d ck q d ck q d ck q d ck q d ck q d ck q d 19 q1 18 q2 17 q3 16 q4 15 q5 14 q6 13 q7 12 q0
TC74VHCV574FT/fk 2010-07-09 3 absolute maximum ratings (note 1) characteristics symbol rating unit supply voltage range v cc ?0.5 to 7.0 v dc input voltage v in ?0.5 to 7.0 v 0.5 to 7.0 (note 2) dc output voltage v out 0.5 to v cc 0.5 (note 3) v input diode current i ik ?50 ma output diode current i ok r 50 (note 4) ma dc output current i out r 50 ma power dissipation p d 180 mw dc v cc /ground current i cc /i gnd r 100 ma storage temperature t stg ?65 to 150 c note1: exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in ic performance or even destruction. using continuously under heavy loads (e.g. the app lication of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temper ature/current/voltage, etc. ) are within the absolute maximum ratings and the operating ranges. please design the appropriate reliability upon reviewing the toshiba semiconductor reliability handbook (?handling precautions?/?derating concept and methods?) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). note 2: output in off-state note 3: high or low state. i out absolute maximum rating must be observed. note 4: v out gnd, v out ! v cc operating ranges (note 1) characteristics symbol rating unit power supply voltage v cc 1.8 to 5.5 v input voltage (dir, oe ) v in 0 to 5.5 v 0 to 5.5 (note 2) output voltage v out 0 to v cc (note 3) v operating temperature t opr 40 to 85 c input rise and fall time dt/dv 0 to 20(vcc=3.3 r 0.3v) 0 to 1(vcc=5 r 0.5v) ms/v note 1: the operating ranges must be maintai ned to ensure the normal op eration of the device. unused inputs must be tied to either v cc or gnd. note 2: output in off-state note 3: high or low state.
TC74VHCV574FT/fk 2010-07-09 4 electrical characteristics dc characteristics test condition ta = 25c ta = 40 to 85c characteristics symbol v cc (v) min typ. max min max unit positive threshold voltage v p ? 1.8 2.3 3.0 4.5 5.5 ? ? ? ? ? ? ? ? ? ? 1.65 1.85 2.20 3.15 3.85 ? ? ? ? ? 1.65 1.85 2.20 3.15 3.85 negative threshold voltage v n ? 1.8 2.3 3.0 4.5 5.5 0.15 0.45 0.90 1.35 1.65 ? ? ? ? ? ? ? ? ? ? 0.15 0.45 0.90 1.35 1.65 ? ? ? ? ? v hysteresis voltage v h ? 1.8 2.3 3.0 4.5 5.5 0.15 0.20 0.30 0.40 0.50 ? ? ? ? ? 1.05 1.10 1.20 1.40 1.60 0.15 0.20 0.30 0.40 0.50 1.05 1.10 1.20 1.40 1.60 v i oh = 50 a 1.8 3.0 4.5 1.7 2.9 4.4 1.8 3.0 4.5 ? ? ? 1.7 2.9 4.4 ? ? ? high-level output voltage v oh v in = v ih or v il i oh = 8 ma i oh = 16 ma 3.0 4.5 2.58 3.94 ? ? ? ? 2.48 3.80 ? ? i ol = 50 a 1.8 3.0 4.5 ? ? ? 0.0 0.0 0.0 0.1 0.1 0.1 ? ? ? 0.1 0.1 0.1 low-level output voltage v ol v in = v ih or v il i ol = 8 ma i ol = 16 ma 3.0 4.5 ? ? ? ? 0.36 0.44 ? ? 0.44 0.55 v 3-state output off-state current i oz v in = v ih or v il v out = 0 to 5.5v 1.8 to 5.5 ? ? 0.5 ? 5.0 a power-off leakage current i off v in /v out 5.5 v 0 ? ? 0.5 ? 5.0 a input leakage current i in v in = 5.5 v or gnd 0 to 5.5 ? ? 0.1 ? 1.0 a quiescent supply current i cc v in = v cc or gnd 5.5 ? ? 2.0 ? 20.0 a
TC74VHCV574FT/fk 2010-07-09 5 timing requirements (input: t r = t f = 3 ns) test condition ta = 25c ta = 40 to 85c characteristics symbol v cc (v) typ. limit limit unit minimum pulse width (ck) t w (h) t w (l) ? 2.5 0.2 3.3 0.3 5.0 0.5 ? ? ? 7.0 5.0 5.0 7.0 5.0 5.0 ns minimum set-up time t s ? 2.5 0.2 3.3 0.3 5.0 0.5 ? ? ? 5.5 3.5 3.5 5.5 3.5 3.5 ns minimum hold time t h ? 2.5 0.2 3.3 0.3 5.0 0.5 ? ? ? 2.0 1.5 1.5 2.0 1.5 1.5 ns
TC74VHCV574FT/fk 2010-07-09 6 ac characteristics (input: t r = t f = 3 ns) test condition ta = 25c ta = 40 to 85c characteristics symbol v cc (v) c l (pf) min typ. max min max unit 15 ? 9.1 16.6 1.0 20.0 2.5 0.2 50 ? 11.9 19.6 1.0 23.0 15 ? 6.7 13.2 1.0 15.5 3.3 0.3 50 ? 8.9 16.7 1.0 19.0 15 ? 5.0 8.6 1.0 10.0 propagation delay time (ck-q) t plh t phl ? 5.0 0.5 50 ? 6.7 10.6 1.0 12.0 ns 15 ? 7.6 16.1 1.0 19.0 2.5 0.2 50 ? 10.7 19.0 1.0 22.0 15 ? 5.7 12.8 1.0 15.0 3.3 0.3 50 ? 8.1 16.3 1.0 18.5 15 ? 4.2 9.0 1.0 10.5 3-state output enable time t pzl t pzh r l = 1 k
5.0 0.5 50 ? 6.1 11.0 1.0 12.5 ns 2.5 0.2 50 ? 13.6 17.5 1.0 20.0 3.3 0.3 50 ? 10.5 15.0 1.0 17.0 3-state output disable time t plz t phz r l = 1 k
5.0 0.5 50 ? 8.2 10.1 1.0 11.5 ns 15 60 95 ? 50 ? 2.5 0.2 50 50 75 ? 40 ? 15 80 135 ? 65 ? 3.3 0.3 50 55 100 ? 45 ? 15 130 180 ? 110 ? maximum clock frequency f max ? 5.0 0.5 50 85 135 ? 75 ? mhz 2.5 0.2 50 ? ? 2.0 ? 2.0 3.3 0.3 50 ? ? 1.5 ? 1.5 output to output skew t oslh t oshl (note 1) 5.0 0.5 50 ? ? 1.0 ? 1.0 ns input capacitance c in ? ? 4 10 ? 10 pf output capacitance c out ? ? 6 ? ? ? pf power dissipation capacitance c pd (note 2) ? 26 ? ? ? pf note 1: parameter guaranteed by design. t oslh = |t plhm t plhn |, t oshl = |t phlm t phln | note 2: c pd is defined as the value of the internal equivalent capacitance which is ca lculated from the operating current consumption without load. average operating current can be obtained by the equation: i cc (opr) = c pd v cc f in + i cc /8 (per f/f) and the total c pd when n pcs. of latch operate can be gained by the following equation: c pd (total) = 14 + 12n
TC74VHCV574FT/fk 2010-07-09 7 noise characteristics (input: t r = t f = 3 ns) test condition ta = 25c characteristics symbol v cc (v) typ. max unit quiet output maximum dynamic v ol v olp c l = 50 pf 3.3 5.0 0.4 0.8 ? ? v quiet output minimum dynamic v ol v olv c l = 50 pf 3.3 5.0 -0.1 -0.4 ? ? v minimum high level dynamic input voltage v ihd c l = 50 pf 5.0 ? 3.5 v maximum low level dynamic input voltage v ild c l = 50 pf 5.0 ? 1.5 v
TC74VHCV574FT/fk 2010-07-09 8 package dimensions weight: 0.08 g (typ.)
TC74VHCV574FT/fk 2010-07-09 9 package dimensions weight: 0.03 g (typ.)
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